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Searched refs:DSS_CONTROL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddss.c50 #define DSS_CONTROL DSS_REG(0x0040) macro
382 DUMPREG(DSS_CONTROL); in dss_dump_regs()
445 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */ in dss_select_dsi_clk_source()
480 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* LCDx_CLK_SWITCH */ in dss_select_lcd_clk_source()
616 REG_FLD_MOD(DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
649 return REG_GET(DSS_CONTROL, 15, 15); in dss_get_hdmi_venc_clk_source()
675 REG_FLD_MOD(DSS_CONTROL, val, 17, 17); in dss_dpi_select_source_omap4()
701 REG_FLD_MOD(DSS_CONTROL, val, 17, 16); in dss_dpi_select_source_omap5()
1119 REG_FLD_MOD(DSS_CONTROL, 0, 0, 0); in dss_bind()
1124 REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ in dss_bind()
[all …]
/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Ddss.c49 #define DSS_CONTROL DSS_REG(0x0040) macro
367 DUMPREG(dss, DSS_CONTROL); in dss_dump_regs()
489 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
520 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
549 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
709 REG_FLD_MOD(dss, DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
715 REG_FLD_MOD(dss, DSS_CONTROL, enable, 5, 5); in dss_set_dac_pwrdn_bgz()
733 REG_FLD_MOD(dss, DSS_CONTROL, src, 15, 15); in dss_select_hdmi_venc_clk_source()
761 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 17); in dss_dpi_select_source_omap4()
788 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 16); in dss_dpi_select_source_omap5()
[all …]
/openbmc/linux/arch/arm/mach-omap2/
H A Ddisplay.c40 #define DSS_CONTROL 0x40 macro
397 omap_hwmod_write(0x0, oh, DSS_CONTROL); in omap_dss_reset()