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Searched refs:DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h6048 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h11791 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h15473 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h14995 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h12043 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h16329 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h14334 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h17075 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h16308 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h23701 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h17366 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h18063 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h12040 #define DSCL1_OBUF_MEM_PWR_CTRL__OBUF_MEM_PWR_MODE__SHIFT … macro