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Searched refs:DSCC_PPS_CONFIG9 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dsc.h50 SRI(DSCC_PPS_CONFIG9, DSCC, id),\
464 uint32_t DSCC_PPS_CONFIG9; member
H A Ddcn20_dsc.c674 REG_SET_2(DSCC_PPS_CONFIG9, 0, in dsc_write_to_registers()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h763 SRI_ARR(DSCC_PPS_CONFIG9, DSCC, id), \