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Searched refs:DSCCLK1_DTO_PARAM (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h62 SR(DSCCLK1_DTO_PARAM),\
132 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\
133 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
H A Ddcn31_dccg.c372 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_disable_dscclk()
414 REG_UPDATE_2(DSCCLK1_DTO_PARAM, in dccg31_enable_dscclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h69 SR(DSCCLK1_DTO_PARAM),\
149 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_PHASE, mask_sh),\
150 DCCG_SF(DSCCLK1_DTO_PARAM, DSCCLK1_DTO_MODULO, mask_sh),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h283 uint32_t DSCCLK1_DTO_PARAM; member