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Searched refs:DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h38981 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h45749 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h43030 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h47938 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h46219 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h49565 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h45001 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h50277 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h51632 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h52316 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h42982 #define DSCC2_DSCC_MEM_POWER_CONTROL__DSCC_MEM_PWR_FORCE__SHIFT … macro