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Searched refs:DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h22887 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h38244 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h45008 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h42437 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h47201 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h45482 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h48828 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h44271 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h49540 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h50904 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h51575 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h42389 #define DSCC1_DSCC_PPS_CONFIG1__BITS_PER_PIXEL__SHIFT … macro