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Searched refs:DRQSR1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/dma/
H A Dpxa2xx_dma.c69 #define DRQSR1 0x00e4 /* DMA DREQ<1> Status register */ macro
287 case DRQSR1: in pxa2xx_dma_read()
354 case DRQSR1: in pxa2xx_dma_write()