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Searched refs:DRAM_SEL_CFG (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c560 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_enable_bypass()
566 clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | in dram_disable_bypass()
H A Dclock_slice.c470 {DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h62 DRAM_SEL_CFG = 48, enumerator