Home
last modified time | relevance | path

Searched refs:DRAM_CLK_SRC_PLL5 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun50i_h6.h301 #define DRAM_CLK_SRC_PLL5 (0 << 24) macro
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun50i_h6.c316 writel(DRAM_CLK_SRC_PLL5, &ccm->dram_clk_cfg); in mctl_sys_init()