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Searched refs:DRAM_BUTTOM (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dddr_calibrate.c34 #define DRAM_BUTTOM 0x02000000 macro
37 #define DRAM_BUTTOM 0x04000000 macro
40 #define DRAM_BUTTOM 0x08000000 macro
43 #define DRAM_BUTTOM 0x10000000 macro
91 nc_addr < (0xa0000000 + DRAM_BUTTOM - NUM_OF_CACHELINE * 32); in test_loop()
92 nc_addr += (DRAM_BUTTOM >> 6) + offs) { in test_loop()