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Searched refs:DRAMTIMING0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_s10.h84 #define DRAMTIMING0 0x50 macro
/openbmc/u-boot/drivers/ddr/altera/
H A Dsdram_s10.c222 u32 dramtim0 = hmc_readl(DRAMTIMING0); in sdram_mmr_init_full()