Searched refs:DQ (Results 1 – 15 of 15) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/power/supply/ |
H A D | maxim,ds2760.yaml | 25 Allow the DS2760 to enter sleep mode when the DQ line goes low for more than 2 seconds 26 and leave sleep Mode when the DQ line goes high.
|
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
H A D | jedec,lpddr-channel.yaml | 10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS, 28 The number of DQ pins in the channel. If this number is different 31 channel (with the channel's DQ pins split up between the different
|
/openbmc/linux/Documentation/driver-api/media/drivers/ |
H A D | pxa_camera.rst | 40 | DQ | | Q | | DQ | 50 |capture list empty / | Q | | DQ | | QCI Irq EOF | 82 - arrow "DQ" means : a buffer was dequeued
|
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | rockchip,rk3399-dmc.yaml | 162 When the DRAM type is DDR3, this parameter defines the PHY side DQ line 163 (including DQS/DQ/DM line) drive strength. 210 When the DRAM type is LPDDR3, this parameter defines the PHY side DQ line 211 (including DQS/DQ/DM line) drive strength. 242 DQS/DQ line strength in ohms. 273 When the DRAM type is LPDDR4, this parameter defines the PHY side DQ line 274 (including DQS/DQ/DM line) drive strength.
|
/openbmc/linux/Documentation/devicetree/bindings/mtd/ |
H A D | cadence-nand-controller.txt | 22 + DQ PAD delay
|
/openbmc/u-boot/board/boundary/nitrogen6x/ |
H A D | ddr-setup.cfg | 77 /* Read data DQ Byte0-3 delay */
|
/openbmc/u-boot/board/toradex/apalis_imx6/ |
H A D | ddr-setup.cfg | 78 /* Read data DQ Byte0-3 delay */
|
/openbmc/u-boot/board/toradex/colibri_imx6/ |
H A D | ddr-setup.cfg | 78 /* Read data DQ Byte0-3 delay */
|
/openbmc/u-boot/drivers/ram/aspeed/ |
H A D | Kconfig | 126 to fine-tune the write DQ/DQS alignment. Please don't change it if you
|
/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | nxp,imx8-isi.yaml | 35 # This may be the case of the i.MX8[DQ]X(P)
|
/openbmc/u-boot/board/barco/titanium/ |
H A D | imximage.cfg | 96 /* Read data DQ Byte0-3 delay */
|
/openbmc/linux/arch/powerpc/xmon/ |
H A D | ppc-opc.c | 319 #define DQ DCMXS + 1 macro 325 #define DS DQ + 1 6338 {"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, 6665 {"lxv", DQX(61,1), DQX_MASK, PPCVSX3, PPCVLE, {XTQ6, DQ, RA0}}, 6666 {"stxv", DQX(61,5), DQX_MASK, PPCVSX3, PPCVLE, {XSQ6, DQ, RA0}},
|
/openbmc/qemu/target/i386/tcg/ |
H A D | emit.c.inc | 548 /* PS maps to the DQ integer instruction, PD maps to QDQ. */ \
|
/openbmc/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 3159 insn = OPC_PSHIFTD_Ib | P_EVEX; /* VPROL[DQ] */
|
/openbmc/openbmc/meta-raspberrypi/recipes-multimedia/rpidistro-ffmpeg/files/ |
H A D | 0004-ffmpeg-4.3.4-rpi_14.patch | 51400 +// DQ a buffer 62464 + else if (s->field_order != V4L2_FIELD_ANY) // Can't DQ if no setup! 62482 + av_log(priv, AV_LOG_ERROR, ">>> %s: DQ fail: %s\n", __func__, av_err2str(rv));
|