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Searched refs:DQ (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dmaxim,ds2760.yaml25 Allow the DS2760 to enter sleep mode when the DQ line goes low for more than 2 seconds
26 and leave sleep Mode when the DQ line goes high.
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
28 The number of DQ pins in the channel. If this number is different
31 channel (with the channel's DQ pins split up between the different
/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dpxa_camera.rst40 | DQ | | Q | | DQ |
50 |capture list empty / | Q | | DQ | | QCI Irq EOF |
82 - arrow "DQ" means : a buffer was dequeued
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml162 When the DRAM type is DDR3, this parameter defines the PHY side DQ line
163 (including DQS/DQ/DM line) drive strength.
210 When the DRAM type is LPDDR3, this parameter defines the PHY side DQ line
211 (including DQS/DQ/DM line) drive strength.
242 DQS/DQ line strength in ohms.
273 When the DRAM type is LPDDR4, this parameter defines the PHY side DQ line
274 (including DQS/DQ/DM line) drive strength.
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dcadence-nand-controller.txt22 + DQ PAD delay
/openbmc/u-boot/board/boundary/nitrogen6x/
H A Dddr-setup.cfg77 /* Read data DQ Byte0-3 delay */
/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dddr-setup.cfg78 /* Read data DQ Byte0-3 delay */
/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dddr-setup.cfg78 /* Read data DQ Byte0-3 delay */
/openbmc/u-boot/drivers/ram/aspeed/
H A DKconfig126 to fine-tune the write DQ/DQS alignment. Please don't change it if you
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8-isi.yaml35 # This may be the case of the i.MX8[DQ]X(P)
/openbmc/u-boot/board/barco/titanium/
H A Dimximage.cfg96 /* Read data DQ Byte0-3 delay */
/openbmc/linux/arch/powerpc/xmon/
H A Dppc-opc.c319 #define DQ DCMXS + 1 macro
325 #define DS DQ + 1
6338 {"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}},
6665 {"lxv", DQX(61,1), DQX_MASK, PPCVSX3, PPCVLE, {XTQ6, DQ, RA0}},
6666 {"stxv", DQX(61,5), DQX_MASK, PPCVSX3, PPCVLE, {XSQ6, DQ, RA0}},
/openbmc/qemu/target/i386/tcg/
H A Demit.c.inc548 /* PS maps to the DQ integer instruction, PD maps to QDQ. */ \
/openbmc/qemu/tcg/i386/
H A Dtcg-target.c.inc3159 insn = OPC_PSHIFTD_Ib | P_EVEX; /* VPROL[DQ] */
/openbmc/openbmc/meta-raspberrypi/recipes-multimedia/rpidistro-ffmpeg/files/
H A D0004-ffmpeg-4.3.4-rpi_14.patch51400 +// DQ a buffer
62464 + else if (s->field_order != V4L2_FIELD_ANY) // Can't DQ if no setup!
62482 + av_log(priv, AV_LOG_ERROR, ">>> %s: DQ fail: %s\n", __func__, av_err2str(rv));