/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_link_encoder.h | 69 SRI(DP_VID_STREAM_CNTL, DP, id), \ 102 SRI(DP_VID_STREAM_CNTL, DP, id), \ 179 uint32_t DP_VID_STREAM_CNTL; member
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H A D | dce_stream_encoder.c | 915 REG_GET(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, ®1); in dce110_stream_encoder_dp_blank() 921 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2); in dce110_stream_encoder_dp_blank() 929 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in dce110_stream_encoder_dp_blank() 936 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in dce110_stream_encoder_dp_blank() 1010 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in dce110_stream_encoder_dp_unblank()
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H A D | dce_stream_encoder.h | 91 SRI(DP_VID_STREAM_CNTL, DP, id), \ 162 SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, mask_sh),\ 163 SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, mask_sh),\ 164 SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, mask_sh),\ 663 uint32_t DP_VID_STREAM_CNTL; member
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H A D | dce_link_encoder.c | 457 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in set_dp_phy_pattern_hbr2_compliance_cp2520_2() 509 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_dio_stream_encoder.c | 332 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, false); in enc32_stream_encoder_dp_unblank() 333 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); in enc32_stream_encoder_dp_unblank() 378 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in enc32_stream_encoder_dp_unblank()
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H A D | dcn32_resource.h | 292 SRI_ARR(DP_VID_N, DP, id), SRI_ARR(DP_VID_STREAM_CNTL, DP, id), \ 334 SRI_ARR(DP_SEC_CNTL, DP, id), SRI_ARR(DP_VID_STREAM_CNTL, DP, id), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_dio_stream_encoder.c | 341 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, false); in enc314_stream_encoder_dp_unblank() 342 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); in enc314_stream_encoder_dp_unblank() 367 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in enc314_stream_encoder_dp_unblank()
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H A D | dcn314_dio_stream_encoder.h | 96 SRI(DP_VID_STREAM_CNTL, DP, id), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_stream_encoder.c | 515 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, false); in enc2_stream_encoder_dp_unblank() 516 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); in enc2_stream_encoder_dp_unblank() 547 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in enc2_stream_encoder_dp_unblank()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_dio_link_encoder.h | 51 SRI(DP_VID_STREAM_CNTL, DP, id), \
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H A D | dcn30_dio_stream_encoder.h | 95 SRI(DP_VID_STREAM_CNTL, DP, id), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
H A D | dcn301_dio_link_encoder.h | 52 SRI(DP_VID_STREAM_CNTL, DP, id), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_stream_encoder.c | 919 REG_GET(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, ®1); in enc1_stream_encoder_dp_blank() 926 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2); in enc1_stream_encoder_dp_blank() 934 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in enc1_stream_encoder_dp_blank() 943 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in enc1_stream_encoder_dp_blank() 1026 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in enc1_stream_encoder_dp_unblank()
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H A D | dcn10_link_encoder.h | 62 SRI(DP_VID_STREAM_CNTL, DP, id), \ 104 uint32_t DP_VID_STREAM_CNTL; member
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H A D | dcn10_stream_encoder.h | 93 SRI(DP_VID_STREAM_CNTL, DP, id), \ 143 uint32_t DP_VID_STREAM_CNTL; member
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H A D | dcn10_link_encoder.c | 389 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
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