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Searched refs:DP_SEC_CNTL (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.c777 value = REG_READ(DP_SEC_CNTL); in enc1_stream_encoder_update_dp_info_packets()
779 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_stream_encoder_update_dp_info_packets()
871 value = REG_READ(DP_SEC_CNTL); in enc1_stream_encoder_send_immediate_sdp_message()
873 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_stream_encoder_send_immediate_sdp_message()
883 REG_SET_10(DP_SEC_CNTL, 0, in enc1_stream_encoder_stop_dp_info_packets()
898 value = REG_READ(DP_SEC_CNTL); in enc1_stream_encoder_stop_dp_info_packets()
1394 REG_UPDATE(DP_SEC_CNTL, DP_SEC_ASP_ENABLE, 1); in enc1_se_enable_dp_audio()
1397 REG_UPDATE_2(DP_SEC_CNTL, in enc1_se_enable_dp_audio()
1402 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc1_se_enable_dp_audio()
1412 REG_UPDATE_5(DP_SEC_CNTL, in enc1_se_disable_dp_audio()
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H A Ddcn10_link_encoder.h61 SRI(DP_SEC_CNTL, DP, id), \
103 uint32_t DP_SEC_CNTL; member
H A Ddcn10_stream_encoder.h85 SRI(DP_SEC_CNTL, DP, id), \
135 uint32_t DP_SEC_CNTL; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.c869 value = REG_READ(DP_SEC_CNTL); in dce110_stream_encoder_update_dp_info_packets()
871 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_stream_encoder_update_dp_info_packets()
882 REG_SET_7(DP_SEC_CNTL, 0, in dce110_stream_encoder_stop_dp_info_packets()
895 value = REG_READ(DP_SEC_CNTL); in dce110_stream_encoder_stop_dp_info_packets()
897 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_stream_encoder_stop_dp_info_packets()
1403 REG_UPDATE(DP_SEC_CNTL, DP_SEC_ASP_ENABLE, 1); in dce110_se_enable_dp_audio()
1406 REG_UPDATE_2(DP_SEC_CNTL, in dce110_se_enable_dp_audio()
1411 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce110_se_enable_dp_audio()
1421 REG_UPDATE_5(DP_SEC_CNTL, in dce110_se_disable_dp_audio()
1430 value = REG_READ(DP_SEC_CNTL); in dce110_se_disable_dp_audio()
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H A Ddce_stream_encoder.h87 SRI(DP_SEC_CNTL, DP, id), \
155 SE_SF(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
157 SE_SF(DP_SEC_CNTL, DP_SEC_GSP1_ENABLE, mask_sh),\
158 SE_SF(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\
160 SE_SF(DP_SEC_CNTL, DP_SEC_AVI_ENABLE, mask_sh),\
161 SE_SF(DP_SEC_CNTL, DP_SEC_MPG_ENABLE, mask_sh),\
199 SE_SF(DP_SEC_CNTL, DP_SEC_ASP_ENABLE, mask_sh),\
200 SE_SF(DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\
201 SE_SF(DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\
202 SE_SF(DP_SEC_CNTL, DP_SEC_ACM_ENABLE, mask_sh),\
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H A Ddce_link_encoder.h68 SRI(DP_SEC_CNTL, DP, id), \
101 SRI(DP_SEC_CNTL, DP, id), \
178 uint32_t DP_SEC_CNTL; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.c377 REG_UPDATE(DP_SEC_CNTL, in enc3_dp_set_dsc_pps_info_packet()
404 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc3_read_state()
497 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, info_frame->vsc.valid); in enc3_stream_encoder_update_dp_info_packets()
498 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, info_frame->spd.valid); in enc3_stream_encoder_update_dp_info_packets()
499 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, info_frame->hdrsmd.valid); in enc3_stream_encoder_update_dp_info_packets()
500 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, info_frame->adaptive_sync.valid); in enc3_stream_encoder_update_dp_info_packets()
509 value = REG_READ(DP_SEC_CNTL); in enc3_stream_encoder_update_dp_info_packets()
511 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc3_stream_encoder_update_dp_info_packets()
518 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc3_stream_encoder_update_dp_info_packets()
H A Ddcn30_dio_link_encoder.h50 SRI(DP_SEC_CNTL, DP, id), \
H A Ddcn30_dio_stream_encoder.h87 SRI(DP_SEC_CNTL, DP, id), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_stream_encoder.c337 REG_UPDATE_2(DP_SEC_CNTL, in enc2_dp_set_dsc_pps_info_packet()
342 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, 0); in enc2_dp_set_dsc_pps_info_packet()
364 REG_GET(DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, &s->sec_gsp_pps_enable); in enc2_read_state()
365 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc2_read_state()
456 REG_UPDATE(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in enc2_stream_encoder_update_dp_info_packets()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_dio_link_encoder.h51 SRI(DP_SEC_CNTL, DP, id), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_stream_encoder.c414 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc32_read_state()
H A Ddcn32_resource.h288 SRI_ARR(DP_PIXEL_FORMAT, DP, id), SRI_ARR(DP_SEC_CNTL, DP, id), \
334 SRI_ARR(DP_SEC_CNTL, DP, id), SRI_ARR(DP_VID_STREAM_CNTL, DP, id), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.c409 REG_GET(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, &s->sec_stream_enable); in enc314_read_state()
H A Ddcn314_dio_stream_encoder.h88 SRI(DP_SEC_CNTL, DP, id), \
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1636 tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_ASP_ENABLE, 1); in dce_v6_0_audio_dp_enable()
1637 tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_ATP_ENABLE, 1); in dce_v6_0_audio_dp_enable()
1638 tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_AIP_ENABLE, 1); in dce_v6_0_audio_dp_enable()
1639 tmp = REG_SET_FIELD(tmp, DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, 1); in dce_v6_0_audio_dp_enable()