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Searched refs:DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__500US (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h2953 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__500US= 0x2, enumerator
H A Ddce_11_2_enum.h3390 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__500US= 0x2, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h9058 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__500US = 0x00000002, enumerator
H A Dnavi10_enum.h7565 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__500US = 0x00000002, enumerator
H A Dsoc21_enum.h7813 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__500US = 0x00000002, enumerator