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Searched refs:DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__400US (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h2952 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__400US= 0x1, enumerator
H A Ddce_11_2_enum.h3389 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__400US= 0x1, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h9057 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__400US = 0x00000001, enumerator
H A Dnavi10_enum.h7564 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__400US = 0x00000001, enumerator
H A Dsoc21_enum.h7812 DP_AUX_GTC_SYNC_CONTROL_INTERVAL_RESET_WINDOW__400US = 0x00000001, enumerator