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Searched refs:DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO32_PERIOD (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h2897 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO32_PERIOD= 0x4, enumerator
H A Ddce_11_2_enum.h3334 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO32_PERIOD= 0x4, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h8957 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO32_PERIOD = 0x00000004, enumerator
H A Dnavi10_enum.h7457 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO32_PERIOD = 0x00000004, enumerator
H A Dsoc21_enum.h7719 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO32_PERIOD = 0x00000004, enumerator