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Searched refs:DP_AUX_CH_CTL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_aux.c529 return DP_AUX_CH_CTL(aux_ch); in g4x_aux_ctl_reg()
532 return DP_AUX_CH_CTL(AUX_CH_B); in g4x_aux_ctl_reg()
561 return DP_AUX_CH_CTL(aux_ch); in ilk_aux_ctl_reg()
568 return DP_AUX_CH_CTL(AUX_CH_A); in ilk_aux_ctl_reg()
604 return DP_AUX_CH_CTL(aux_ch); in skl_aux_ctl_reg()
607 return DP_AUX_CH_CTL(AUX_CH_A); in skl_aux_ctl_reg()
647 return DP_AUX_CH_CTL(aux_ch); in tgl_aux_ctl_reg()
650 return DP_AUX_CH_CTL(AUX_CH_A); in tgl_aux_ctl_reg()
H A Dintel_dp_aux_regs.h22 #define DP_AUX_CH_CTL(aux_ch) _MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL) macro
H A Dintel_display_power_well.c518 intel_de_rmw(dev_priv, DP_AUX_CH_CTL(aux_ch), in icl_tc_phy_aux_power_well_enable()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c1079 if (reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_A))) in trigger_aux_channel_interrupt()
1082 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_B))) in trigger_aux_channel_interrupt()
1085 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_C))) in trigger_aux_channel_interrupt()
1088 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_D))) in trigger_aux_channel_interrupt()
2589 MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
2591 MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
2593 MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c907 MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4); in iterate_skl_plus_mmio()
908 MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4); in iterate_skl_plus_mmio()
909 MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4); in iterate_skl_plus_mmio()