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Searched refs:DP_AUX5_AUX_SW_CONTROL__AUX_SW_WR_BYTES__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h29658 #define DP_AUX5_AUX_SW_CONTROL__AUX_SW_WR_BYTES__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h38988 #define DP_AUX5_AUX_SW_CONTROL__AUX_SW_WR_BYTES__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h37933 #define DP_AUX5_AUX_SW_CONTROL__AUX_SW_WR_BYTES__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h36892 #define DP_AUX5_AUX_SW_CONTROL__AUX_SW_WR_BYTES__SHIFT … macro