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Searched refs:DPU_CLK_CTRL_DMA1 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_5_4_sm6125.h29 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
91 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_6_2_sc7180.h26 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
75 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_6_4_sm6350.h28 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
82 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_7_2_sc7280.h26 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
80 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_3_0_msm8998.h34 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
116 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_4_0_sdm845.h34 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
114 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_7_0_sm8350.h31 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_5_0_sm8150.h34 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
123 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_6_0_sm8250.h31 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_9_0_sm8550.h32 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x26330, .bit_off = 0 },
124 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_8_1_sm8450.h32 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
123 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_5_1_sc8180x.h34 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_8_0_sc8280xp.h32 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
122 .clk_ctrl = DPU_CLK_CTRL_DMA1,
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h457 DPU_CLK_CTRL_DMA1, enumerator