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Searched refs:DPRINTF (Results 1 – 25 of 73) sorted by relevance

123

/openbmc/qemu/target/mips/
H A Dkvm.c30 #define DPRINTF(fmt, ...) \ macro
55 DPRINTF("%s\n", __func__); in kvm_arch_init()
89 DPRINTF("%s\n", __func__); in kvm_arch_init_vcpu()
111 DPRINTF("%s\n", __func__); in kvm_mips_reset_vcpu()
116 DPRINTF("%s\n", __func__); in kvm_arch_insert_sw_breakpoint()
122 DPRINTF("%s\n", __func__); in kvm_arch_remove_sw_breakpoint()
170 DPRINTF("%s\n", __func__); in kvm_arch_handle_exit()
184 DPRINTF("%s\n", __func__); in kvm_arch_stop_on_emulation_error()
228 DPRINTF("%s: CPU %d, IRQ: %d\n", __func__, intr.cpu, intr.irq); in kvm_mips_set_ipi_interrupt()
855 DPRINTF("%s: Failed to put CP0_EPC (%d)\n", __func__, err); in kvm_mips_put_cp0_registers()
[all …]
/openbmc/qemu/hw/net/
H A Drtl8139.c85 # define DPRINTF(fmt, ...) \ macro
696 DPRINTF("=== eeprom: end access\n"); in prom9346_set_wire()
832 DPRINTF(">>> received len=%zu\n", size); in rtl8139_do_receive()
931 DPRINTF(">>> unknown packet\n"); in rtl8139_do_receive()
1357 DPRINTF("ChipCmd reset\n"); in rtl8139_ChipCmd_write()
1362 DPRINTF("ChipCmd enable receiver\n"); in rtl8139_ChipCmd_write()
1392 DPRINTF("receiver buffer is empty\n"); in rtl8139_RxBufferEmpty()
2492 DPRINTF("TSAD read val=0x%04x\n", ret); in rtl8139_TSAD_read()
2501 DPRINTF("CSCR read val=0x%04x\n", ret); in rtl8139_CSCR_read()
2558 DPRINTF("RxBuf write val=0x%08x\n", val); in rtl8139_RxBuf_write()
[all …]
H A Dlan9118.c32 #define DPRINTF(fmt, ...) \ macro
35 #define DPRINTF(fmt, ...) do {} while(0) macro
378 DPRINTF("MACADDR load failed\n"); in lan9118_reload_eeprom()
385 DPRINTF("MACADDR loaded from eeprom\n"); in lan9118_reload_eeprom()
668 DPRINTF("RX underflow\n"); in rx_fifo_pop()
908 DPRINTF("MAC_CR: %08x\n", val); in do_mac_write()
931 DPRINTF("PHY write %d = 0x%04x\n", in do_mac_write()
936 DPRINTF("PHY read %d = 0x%04x\n", in do_mac_write()
997 DPRINTF("EEPROM Write Disable\n"); in lan9118_eeprom_cmd()
1001 DPRINTF("EEPROM Write Enable\n"); in lan9118_eeprom_cmd()
[all …]
/openbmc/qemu/hw/char/
H A Dipoctal232.c198 DPRINTF("Write CR%c %u: ", channel + 'a', val); in write_cr()
285 DPRINTF("Read SR%c: 0x%x\n", channel + 'a', ret); in io_read()
310 DPRINTF("Read ISR%c: 0x%x\n", block + 'A', ret); in io_read()
375 DPRINTF("Write ACR%c 0x%x\n", block + 'A', val); in io_write()
379 DPRINTF("Write IMR%c 0x%x\n", block + 'A', val); in io_write()
385 DPRINTF("Write OPCR%c 0x%x\n", block + 'A', val); in io_write()
415 DPRINTF("Write IRQ vector: %u\n", (unsigned) val); in id_write()
427 DPRINTF("Attempt to read from 0x%x\n", addr); in int_read()
443 DPRINTF("Attempt to read from 0x%x\n", addr); in mem_read16()
454 DPRINTF("Attempt to read from 0x%x\n", addr); in mem_read8()
[all …]
/openbmc/qemu/hw/sd/
H A Dssi-sd.c32 #define DPRINTF(fmt, ...) \ macro
37 #define DPRINTF(fmt, ...) do {} while(0) macro
135 DPRINTF("NULL command\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
140 DPRINTF("Start write block\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
154 DPRINTF("SD card busy\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
262 DPRINTF("Data read\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
265 DPRINTF("End of command\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
274 DPRINTF("Start read block\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
283 DPRINTF("Data read end\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
292 DPRINTF("CRC16 read end\n"); in OBJECT_DECLARE_SIMPLE_TYPE()
[all …]
/openbmc/qemu/hw/ipack/
H A Dtpci200.c24 #define DPRINTF(fmt, ...) \ macro
27 #define DPRINTF(fmt, ...) do { } while (0) macro
136 DPRINTF("IP %u INT%u#: %u\n", ip_n, intno, level); in tpci200_set_irq()
208 DPRINTF("Read REVISION ID\n"); /* Current value is 0x00 */ in tpci200_read_las0()
223 DPRINTF("Read RESET\n"); /* Not implemented */ in tpci200_read_las0()
228 DPRINTF("Read STATUS: 0x%x\n", (unsigned) ret); in tpci200_read_las0()
287 DPRINTF("Clear IP %c timeout\n", 'A' + i); in tpci200_write_las0()
301 DPRINTF("Unsupported write to LAS0 0x%x: 0x%x\n", in tpci200_write_las0()
326 DPRINTF("Read LAS1: IP module %u not installed\n", ip_n); in tpci200_read_las1()
436 DPRINTF("Read LAS2: IP module %u not installed\n", ip_n); in tpci200_read_las2()
[all …]
/openbmc/qemu/hw/i2c/
H A Dsmbus_slave.c25 #define DPRINTF(fmt, ...) \ macro
32 #define DPRINTF(fmt, ...) do {} while(0) macro
51 DPRINTF("Quick Command %d\n", recv); in smbus_do_quick_cmd()
61 DPRINTF("Command %d len %d\n", dev->data_buf[0], dev->data_len); in smbus_do_write()
75 DPRINTF("Incoming data\n"); in smbus_i2c_event()
89 DPRINTF("Read mode\n"); in smbus_i2c_event()
99 DPRINTF("Read mode\n"); in smbus_i2c_event()
170 DPRINTF("Read data %02x\n", ret); in smbus_i2c_recv()
188 DPRINTF("Write data %02x\n", data); in smbus_i2c_send()
H A Dmpc_i2c.c31 #define DPRINTF(fmt, ...) \ macro
35 #define DPRINTF(fmt, ...) do {} while (0) macro
187 DPRINTF("read failed for device"); in mpc_i2c_data_recive()
215 DPRINTF("MTX is set not in recv mode\n"); in mpc_i2c_read()
223 DPRINTF("ERROR: Bad read addr 0x%x\n", (unsigned int)addr); in mpc_i2c_read()
227 DPRINTF("%s: addr " HWADDR_FMT_plx " %02" PRIx32 "\n", __func__, in mpc_i2c_read()
237 DPRINTF("%s: addr " HWADDR_FMT_plx " val %08" PRIx64 "\n", __func__, in mpc_i2c_write()
299 DPRINTF("ERROR: Bad write addr 0x%x\n", (unsigned int)addr); in mpc_i2c_write()
/openbmc/qemu/hw/intc/
H A Dopenpic.c58 #define DPRINTF(fmt, ...) do { \ macro
249 DPRINTF("%s: IRQ %d active %d was %d", in IRQ_local_pipe()
676 DPRINTF("%s: => 0x%08x", __func__, retval); in openpic_gbl_read()
691 DPRINTF("%s n_IRQ=%d", __func__, n_IRQ); in qemu_timer_cb()
824 DPRINTF("%s: => 0x%08x", __func__, retval); in openpic_tmr_read()
878 DPRINTF("%s: => 0x%08x", __func__, retval); in openpic_src_read()
1022 DPRINTF("EOI"); in openpic_cpu_write_internal()
1061 DPRINTF("Lower OpenPIC INT output"); in openpic_iack()
1065 DPRINTF("IACK: irq=%d", irq); in openpic_iack()
1095 DPRINTF("irq is IPI or TMR"); in openpic_iack()
[all …]
H A Dimx_avic.c29 #define DPRINTF(fmt, args...) \ macro
95 DPRINTF("Raising IRQ %d, prio %d\n", in imx_avic_set_irq()
99 DPRINTF("Clearing IRQ %d, prio %d\n", in imx_avic_set_irq()
113 DPRINTF("read(offset = 0x%" HWADDR_PRIx ")\n", offset); in imx_avic_read()
229 DPRINTF("(0x%" HWADDR_PRIx ") = 0x%x\n", offset, (unsigned int)val); in imx_avic_write()
244 DPRINTF("enable(%d)\n", (int)val); in imx_avic_write()
250 DPRINTF("disable(%d)\n", (int)val); in imx_avic_write()
/openbmc/qemu/hw/misc/
H A Dimx25_ccm.c24 #define DPRINTF(fmt, args...) \ macro
121 DPRINTF("freq = %u\n", freq); in imx25_ccm_get_mpll_clk()
139 DPRINTF("freq = %u\n", freq); in imx25_ccm_get_mcu_clk()
152 DPRINTF("freq = %u\n", freq); in imx25_ccm_get_ahb_clk()
163 DPRINTF("freq = %u\n", freq); in imx25_ccm_get_ipg_clk()
171 DPRINTF("Clock = %d)\n", clock); in imx25_ccm_get_clock_frequency()
189 DPRINTF("Clock = %d) = %u\n", clock, freq); in imx25_ccm_get_clock_frequency()
198 DPRINTF("\n"); in imx25_ccm_reset()
241 DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx25_ccm_reg_name(offset >> 2), in imx25_ccm_read()
252 DPRINTF("reg[%s] <= 0x%" PRIx32 "\n", imx25_ccm_reg_name(offset >> 2), in imx25_ccm_write()
H A Dimx31_ccm.c26 #define DPRINTF(fmt, args...) \ macro
123 DPRINTF("freq = %u\n", freq); in imx31_ccm_get_pll_ref_clk()
136 DPRINTF("freq = %u\n", freq); in imx31_ccm_get_mpll_clk()
153 DPRINTF("freq = %u\n", freq); in imx31_ccm_get_mcu_main_clk()
166 DPRINTF("freq = %u\n", freq); in imx31_ccm_get_hclk_clk()
179 DPRINTF("freq = %u\n", freq); in imx31_ccm_get_ipg_clk()
204 DPRINTF("Clock = %d) = %u\n", clock, freq); in imx31_ccm_get_clock_frequency()
213 DPRINTF("()\n"); in imx31_ccm_reset()
247 DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx31_ccm_reg_name(offset >> 2), in imx31_ccm_read()
258 DPRINTF("reg[%s] <= 0x%" PRIx32 "\n", imx31_ccm_reg_name(offset >> 2), in imx31_ccm_write()
/openbmc/qemu/hw/m68k/
H A Dnext-cube.c34 #define DPRINTF(fmt, ...) \ macro
37 #define DPRINTF(fmt, ...) do { } while (0) macro
136 DPRINTF("fault!\n"); in next_scr2_led_update()
421 DPRINTF("SCSICSR Enable\n"); in next_scr_writefn()
435 DPRINTF("SCSICSR Reset\n"); in next_scr_writefn()
442 DPRINTF("SCSICSR DMAdir\n"); in next_scr_writefn()
445 DPRINTF("SCSICSR CPUDMA\n"); in next_scr_writefn()
454 DPRINTF("SCSICSR INTMASK\n"); in next_scr_writefn()
599 DPRINTF("SCSI DMA CSR READ\n"); in next_dma_read()
821 DPRINTF("SCSI READ: %x\n", len); in nextscsi_read()
[all …]
/openbmc/qemu/hw/dma/
H A Di82374.c40 #define DPRINTF(fmt, ...) \ macro
43 #define DPRINTF(fmt, ...) \
73 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); in i82374_read_isr()
79 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); in i82374_write_command()
93 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); in i82374_read_status()
99 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); in i82374_write_descriptor()
110 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); in i82374_read_descriptor()
H A Dxlnx_dpdma.c400 DPRINTF("read @%" HWADDR_PRIx "\n", offset); in xlnx_dpdma_read()
690 DPRINTF("Channel isn't triggered..\n"); in xlnx_dpdma_start_operation()
695 DPRINTF("Channel isn't enabled..\n"); in xlnx_dpdma_start_operation()
700 DPRINTF("Channel is paused..\n"); in xlnx_dpdma_start_operation()
717 DPRINTF("Can't get the descriptor.\n"); in xlnx_dpdma_start_operation()
732 DPRINTF("Invalid descriptor..\n"); in xlnx_dpdma_start_operation()
741 DPRINTF("Bad CRC for descriptor..\n"); in xlnx_dpdma_start_operation()
773 DPRINTF("Can't get data.\n"); in xlnx_dpdma_start_operation()
781 DPRINTF("Source address:\n"); in xlnx_dpdma_start_operation()
802 DPRINTF("Can't get data.\n"); in xlnx_dpdma_start_operation()
[all …]
/openbmc/qemu/hw/usb/
H A Ddev-smartcard-reader.c51 #define DPRINTF(s, lvl, fmt, ...) \ macro
636 DPRINTF(s, 1, "Reset\n"); in ccid_handle_reset()
944 DPRINTF(s, 1, in ccid_on_apdu_from_guest()
999 DPRINTF(s, D_VERBOSE, in ccid_handle_bulk_out()
1005 DPRINTF(s, 1, in ccid_handle_bulk_out()
1055 DPRINTF(s, 1, in ccid_handle_bulk_out()
1098 DPRINTF(s, D_MORE_INFO, in ccid_bulk_in_copy_to_guest()
1103 DPRINTF(s, 1, in ccid_bulk_in_copy_to_guest()
1132 DPRINTF(s, D_INFO, in ccid_handle_data()
1226 DPRINTF(s, 1, "CCID Attach\n"); in ccid_card_ccid_attach()
[all …]
H A Dhcd-xhci.c38 #define DPRINTF(...) fprintf(stderr, __VA_ARGS__) macro
40 #define DPRINTF(...) do {} while (0) macro
469 DPRINTF("xhci: asserted controller error\n"); in xhci_die()
992 DPRINTF("xhci: alloc streams failed\n"); in xhci_alloc_device_streams()
1302 DPRINTF("xhci: bad ep %d\n", epid); in xhci_stop_ep()
1339 DPRINTF("xhci: bad ep %d\n", epid); in xhci_reset_ep()
1390 DPRINTF("xhci: bad ep %d\n", epid); in xhci_set_ep_dequeue()
2128 DPRINTF("xhci: port not found\n"); in xhci_address_slot()
2430 DPRINTF("xhci_get_port_bandwidth()\n"); in xhci_get_port_bandwidth()
2472 DPRINTF("xhci_process_commands()\n"); in xhci_process_commands()
[all …]
H A Dccid-card-passthru.c26 #define DPRINTF(card, lvl, fmt, ...) \ macro
148 DPRINTF(card, D_WARN, in ccid_card_vscard_handle_init()
167 DPRINTF(card, D_WARN, "atr's T0 is 0x%X, not in {0x3b, 0x3f}\n", in check_atr()
190 DPRINTF(card, D_WARN, in check_atr()
196 DPRINTF(card, D_WARN, in check_atr()
201 DPRINTF(card, D_VERBOSE, in check_atr()
215 DPRINTF(card, D_INFO, "VSC_ATR %d\n", scr_msg_header->length); in ccid_card_vscard_handle_message()
239 DPRINTF(card, D_INFO, "VSC_CardRemove\n"); in ccid_card_vscard_handle_message()
321 DPRINTF(card, D_INFO, "%s: CHR_EVENT_OPENED\n", __func__); in ccid_card_vscard_event()
360 DPRINTF(card, D_INFO, "ccid-card-passthru: initing chardev"); in passthru_realize()
/openbmc/qemu/hw/audio/
H A Dlm4549.c31 #define DPRINTF(fmt, ...) \ macro
34 #define DPRINTF(fmt, ...) do {} while (0) macro
132 DPRINTF("audio_out_callback size = %i free = %i\n", size, free); in lm4549_audio_out_callback()
163 DPRINTF("read [0x%02x] = 0x%04x\n", offset, value); in lm4549_read()
174 DPRINTF("write [0x%02x] = 0x%04x\n", offset, value); in lm4549_write()
183 DPRINTF("DAC rate change = %i\n", value); in lm4549_write()
211 DPRINTF("Write to read-only register 0x%x\n", (int)offset); in lm4549_write()
229 DPRINTF("write_sample Buffer full\n"); in lm4549_write_samples()
253 DPRINTF("post_load freq = %i\n", freq); in lm4549_post_load()
254 DPRINTF("post_load voice_is_active = %i\n", s->voice_is_active); in lm4549_post_load()
/openbmc/qemu/hw/ssi/
H A Dimx_spi.c22 #define DPRINTF(fmt, args...) \ macro
121 DPRINTF("IRQ level is %d\n", level); in imx_spi_update_irq()
167 DPRINTF("Begin: TX Fifo Size = %d, RX Fifo Size = %d\n", in imx_spi_flush_txfifo()
176 DPRINTF("Burst length = %d\n", s->burst_length); in imx_spi_flush_txfifo()
185 DPRINTF("data tx:0x%08x\n", tx); in imx_spi_flush_txfifo()
194 DPRINTF("writing 0x%02x\n", (uint32_t)byte); in imx_spi_flush_txfifo()
199 DPRINTF("0x%02x read\n", (uint32_t)byte); in imx_spi_flush_txfifo()
208 DPRINTF("data rx:0x%08x\n", rx); in imx_spi_flush_txfifo()
231 DPRINTF("End: TX Fifo Size = %d, RX Fifo Size = %d\n", in imx_spi_flush_txfifo()
324 DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx_spi_reg_name(index), value); in imx_spi_read()
[all …]
/openbmc/qemu/hw/net/rocker/
H A Drocker_desc.c77 DPRINTF("ERROR: trying to write more to desc buf than it " in desc_set_buf()
107 DPRINTF("ERROR: ring[%d] desc base addr (0x" HWADDR_FMT_plx in desc_ring_set_base_addr()
127 DPRINTF("ERROR: ring[%d] size (%d) not a power of 2 " in desc_ring_set_size()
178 DPRINTF("ERROR: ring[%d] not-initialized desc base address!\n", in desc_ring_base_addr_check()
216 DPRINTF("ERROR: ring[%d] trying to post desc to empty ring\n", in desc_ring_post_desc()
262 DPRINTF("ERROR: trying to set head (%d) past ring[%d] size (%d)\n", in desc_ring_set_head()
269 DPRINTF("ERROR: trying to wrap ring[%d] " in desc_ring_set_head()
276 DPRINTF("WARNING: setting head (%d) to current head position\n", new); in desc_ring_set_head()
297 DPRINTF("ring[%d] resetting\n", ring->index); in desc_ring_set_ctrl()
305 DPRINTF("ERROR: trying to return more credits (%d) " in desc_ring_ret_credits()
/openbmc/u-boot/drivers/rtc/
H A Dds1302.c31 # define DPRINTF(x,args...) printf("ds1302: " x , ##args) macro
38 # define DPRINTF(x,args...) macro
155 DPRINTF("READ 0x%x bytes @ 0x%x [ ", count, addr); in read_ser_drv()
176 DPRINTF("WRITE 0x%x bytes @ 0x%x [ ", count, addr); in write_ser_drv()
196 DPRINTF("init\n"); in rtc_init()
242 DPRINTF("init done\n"); in rtc_init()
281 DPRINTF("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", in rtc_get()
295 DPRINTF("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", in rtc_set()
/openbmc/qemu/hw/i386/xen/
H A Dxen_platform.c49 #define DPRINTF(fmt, ...) do { \ macro
53 #define DPRINTF(fmt, ...) do { } while (0) macro
275 DPRINTF("unplug disks\n"); in platform_fixed_ioport_writew()
279 DPRINTF("unplug nics\n"); in platform_fixed_ioport_writew()
287 DPRINTF("Citrix Windows PV drivers loaded in guest\n"); in platform_fixed_ioport_writew()
290 DPRINTF("Guest claimed to be running PV product 0?\n"); in platform_fixed_ioport_writew()
293 DPRINTF("Unknown PV product %d loaded in guest\n", val); in platform_fixed_ioport_writew()
326 DPRINTF("unable to change ro/rw state of ROM memory area!\n"); in platform_fixed_ioport_writeb()
329 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n", in platform_fixed_ioport_writeb()
500 DPRINTF("Warning: attempted read from physical address " in platform_mmio_read()
[all …]
/openbmc/qemu/chardev/
H A Dbaum.c39 #define DPRINTF(fmt, ...) \
42 #define DPRINTF(fmt, ...) macro
363 DPRINTF("Dropped %td bytes!\n", cur - buf); in baum_eat_packet()
433 DPRINTF("SetMode\n"); in baum_eat_packet()
442 DPRINTF("SetProtocol\n"); in baum_eat_packet()
451 DPRINTF("GetDeviceIdentity\n"); in baum_eat_packet()
460 DPRINTF("GetVersionNumber\n"); in baum_eat_packet()
468 DPRINTF("GetSerialNumber\n"); in baum_eat_packet()
474 DPRINTF("Get%0#2x\n", req); in baum_eat_packet()
535 DPRINTF("writing key %x %x\n", type, value); in baum_send_key()
[all …]
/openbmc/qemu/hw/timer/
H A Dexynos4210_mct.c70 #define DPRINTF(fmt, ...) \ macro
74 #define DPRINTF(fmt, ...) do {} while (0) macro
390 DPRINTF("global timer frc stop\n"); in exynos4210_gfrc_stop()
401 DPRINTF("global timer frc start\n"); in exynos4210_gfrc_start()
484 DPRINTF("found comparator %d: " in exynos4210_gcomp_find()
543 DPRINTF("gcmp timer[%u] IRQ\n", id); in exynos4210_gcomp_raise_irq()
568 DPRINTF("\n"); in exynos4210_gfrc_event()
661 DPRINTF("\n"); in exynos4210_lfrc_event()
1009 DPRINTF("freq=%uHz\n", s->freq); in exynos4210_mct_update_freq()
1079 DPRINTF("read FRC=0x%llx\n", count); in exynos4210_mct_read()
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