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Searched refs:DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h7359 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h17190 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h16454 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h13822 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_1_0_sh_mask.h15734 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h20112 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h18125 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h20866 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h18021 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h25422 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h19077 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h19522 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h13819 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro