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Searched refs:DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h3943 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_0_3_sh_mask.h9114 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_0_1_sh_mask.h12790 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_2_1_0_sh_mask.h12747 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_2_1_sh_mask.h11565 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_1_0_sh_mask.h12673 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_1_2_sh_mask.h15714 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_1_5_sh_mask.h13719 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_1_6_sh_mask.h16460 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_0_2_sh_mask.h13631 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_1_4_sh_mask.h21016 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_0_0_sh_mask.h14697 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_2_0_0_sh_mask.h15815 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro
H A Ddcn_3_2_0_sh_mask.h11562 #define DPP_TOP0_DPP_CONTROL__DPPCLK_G_DYN_GATE_DISABLE_MASK macro