Searched refs:DPHY_RESET (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hpo_dp_link_encoder.h | 109 SE_SF(DP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL, DPHY_RESET, mask_sh),\
136 type DPHY_RESET;\
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| H A D | dcn31_hpo_dp_link_encoder.c | 65 REG_UPDATE(DP_DPHY_SYM32_CONTROL, DPHY_RESET, 1); in dcn31_hpo_dp_link_enc_enable()
66 REG_UPDATE(DP_DPHY_SYM32_CONTROL, DPHY_RESET, 0); in dcn31_hpo_dp_link_enc_enable()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_hpo_dp_link_encoder.h | 33 SE_SF(DP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL, DPHY_RESET, mask_sh),\
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| /openbmc/linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_dsi.c | 48 #define DPHY_RESET BIT(2) macro
286 mtk_dsi_mask(dsi, DSI_CON_CTRL, DPHY_RESET, DPHY_RESET); in mtk_dsi_reset_dphy()
287 mtk_dsi_mask(dsi, DSI_CON_CTRL, DPHY_RESET, 0); in mtk_dsi_reset_dphy()
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