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Searched refs:DPG3_DPG_CONTROL__DPG_MODE_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h22436 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h26237 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h23861 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h28647 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h26672 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h29413 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h25459 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h30676 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h28684 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h29586 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h23858 #define DPG3_DPG_CONTROL__DPG_MODE_MASK … macro