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Searched refs:DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h26004 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_0_1_sh_mask.h22207 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_2_1_sh_mask.h23632 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_1_2_sh_mask.h28418 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_1_5_sh_mask.h26443 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_1_6_sh_mask.h29184 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_1_4_sh_mask.h30447 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_0_2_sh_mask.h25230 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_2_0_0_sh_mask.h29353 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_0_0_sh_mask.h28458 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro
H A Ddcn_3_2_0_sh_mask.h23629 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0_MASK macro