Home
last modified time | relevance | path

Searched refs:DPG1_DPG_CONTROL__DPG_VRES__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h13992 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h13858 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h25745 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h21952 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h23377 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h28163 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h26188 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h28929 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h30192 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h24975 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h29094 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28206 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h23374 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro