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Searched refs:DPG0_DPG_CONTROL__DPG_MODE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h13790 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_0_3_sh_mask.h13615 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h25498 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h21709 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h23134 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h27920 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h25945 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h28686 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h29949 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h24732 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h28847 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h27966 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h23131 #define DPG0_DPG_CONTROL__DPG_MODE__SHIFT macro