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Searched refs:DPCD_TRAINING_PATTERN_SET (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_dp.c311 ret = exynos_dp_write_bytes_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_link_start()
327 ret = exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_training_pattern_dis()
535 DPCD_TRAINING_PATTERN_SET, 5, buf); in exynos_dp_process_clock_recovery()
776 DPCD_TRAINING_PATTERN_SET, &data); in exynos_dp_enable_scramble()
777 exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_enable_scramble()
782 DPCD_TRAINING_PATTERN_SET, &data); in exynos_dp_enable_scramble()
783 exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET, in exynos_dp_enable_scramble()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.h83 #define DPCD_TRAINING_PATTERN_SET 0x102 macro
H A Dhandlers.c1251 if (p == DPCD_TRAINING_PATTERN_SET) in dp_aux_ch_ctl_mmio_write()
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dedp_rk3288.h461 #define DPCD_TRAINING_PATTERN_SET (0x0102) macro
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_edp.c470 ret = rk_edp_dpcd_write(regs, DPCD_TRAINING_PATTERN_SET, &value, 1); in rk_edp_link_train_cr()
550 ret = rk_edp_dpcd_write(regs, DPCD_TRAINING_PATTERN_SET, &value, 1); in rk_edp_link_train_ce()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Ddp.h622 #define DPCD_TRAINING_PATTERN_SET (0x0102) macro