Home
last modified time | relevance | path

Searched refs:DPCD_INTERLANE_ALIGN_DONE (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/include/hw/display/
H A Ddpcd.h98 #define DPCD_INTERLANE_ALIGN_DONE 0x01 macro
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.h103 #define DPCD_INTERLANE_ALIGN_DONE 0x01 macro
H A Dhandlers.c1142 DPCD_INTERLANE_ALIGN_DONE; in dp_aux_ch_ctl_link_training()
/openbmc/qemu/hw/display/
H A Ddpcd.c122 s->dpcd_info[DPCD_LANE_ALIGN_STATUS_UPDATED] = DPCD_INTERLANE_ALIGN_DONE; in dpcd_reset()
/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_dp.c625 interlane_aligned = (sink_stat & DPCD_INTERLANE_ALIGN_DONE); in exynos_dp_process_equalizer_training()
649 && (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) { in exynos_dp_process_equalizer_training()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Ddp.h718 #define DPCD_INTERLANE_ALIGN_DONE (0x1 << 0) macro