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Searched refs:DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h41330 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_1_0_sh_mask.h35549 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h35429 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h32960 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h37728 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h35802 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h38708 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h44561 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h40243 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h45276 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h45036 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h32957 #define DP3_DP_SEC_CNTL2__DP_SEC_GSP4_SEND__SHIFT … macro