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Searched refs:DOMAIN5_PG_CONFIG (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.h238 SR(DOMAIN5_PG_CONFIG), \
282 SR(DOMAIN5_PG_CONFIG), \
346 SR(DOMAIN5_PG_CONFIG), \
454 SR(DOMAIN5_PG_CONFIG), \
506 SR(DOMAIN5_PG_CONFIG), \
603 uint32_t DOMAIN5_PG_CONFIG; member
799 HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \
834 HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \
895 HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \
947 HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_hwseq.c73 REG_UPDATE(DOMAIN5_PG_CONFIG, in dcn302_dpp_pg_control()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c215 REG_UPDATE(DOMAIN5_PG_CONFIG, DOMAIN5_POWER_FORCEON, force_on); in dcn20_enable_power_gating_plane()
463 REG_UPDATE(DOMAIN5_PG_CONFIG, in dcn20_dpp_pg_control()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c571 REG_UPDATE(DOMAIN5_PG_CONFIG, DOMAIN5_POWER_FORCEON, force_on); in dcn10_enable_power_gating_plane()
648 REG_UPDATE(DOMAIN5_PG_CONFIG, in dcn10_dpp_pg_control()