Searched refs:DMC_MON_G12_CTRL0 (Results 1 – 1 of 1) sorted by relevance
24 #define DMC_MON_G12_CTRL0 (0x0 << 2) macro179 r = readl(db->ddr_reg[0] + (DMC_MON_G12_CTRL0 + (i << 2))); in g12_dump_reg()206 val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0); in dmc_g12_counter_enable()213 writel(val, info->ddr_reg[0] + DMC_MON_G12_CTRL0); in dmc_g12_counter_enable()268 writel(0, info->ddr_reg[0] + DMC_MON_G12_CTRL0); in dmc_g12_counter_disable()304 val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0); in dmc_g12_irq_handler()308 writel(val, info->ddr_reg[0] + DMC_MON_G12_CTRL0); in dmc_g12_irq_handler()