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Searched refs:DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5981 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK 0x00000700L macro
H A Ddce_8_0_sh_mask.h8117 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK 0x700 macro
H A Ddce_10_0_sh_mask.h7181 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK 0x700 macro
H A Ddce_11_0_sh_mask.h7071 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK 0x700 macro
H A Ddce_11_2_sh_mask.h8183 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK 0x700 macro
H A Ddce_12_0_sh_mask.h5080 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1711 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2806 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2605 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_1_0_sh_mask.h4099 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_1_2_sh_mask.h2290 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1647 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2857 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2766 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10920 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2863 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2873 #define DMCU_UC_CLK_GATING_CNTL__UC_ERAM_RD_DELAY_MASK … macro