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Searched refs:DMCU_STATUS__UC_IN_WAIT_MODE_MASK (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5973 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK 0x00000002L macro
H A Ddce_8_0_sh_mask.h7715 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK 0x2 macro
H A Ddce_10_0_sh_mask.h6759 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK 0x2 macro
H A Ddce_11_0_sh_mask.h6655 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK 0x2 macro
H A Ddce_11_2_sh_mask.h7735 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK 0x2 macro
H A Ddce_12_0_sh_mask.h4662 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1340 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2138 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_1_0_sh_mask.h3632 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2283 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1763 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1274 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2330 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10393 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2209 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2406 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2276 #define DMCU_STATUS__UC_IN_WAIT_MODE_MASK … macro