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Searched refs:DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5685 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK 0x00800000L macro
H A Ddce_8_0_sh_mask.h7781 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK 0x800000 macro
H A Ddce_10_0_sh_mask.h6825 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK 0x800000 macro
H A Ddce_11_0_sh_mask.h6719 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK 0x800000 macro
H A Ddce_11_2_sh_mask.h7799 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK 0x800000 macro
H A Ddce_12_0_sh_mask.h4741 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1419 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2217 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_1_0_sh_mask.h3711 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1842 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1353 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2409 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2288 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10472 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2355 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2485 #define DMCU_EVENT_TRIGGER__GEN_UC_INTERNAL_INT_TO_HOST_MASK … macro