Home
last modified time | relevance | path

Searched refs:DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5683 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h7777 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h6821 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h6715 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h7795 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h4739 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1417 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2215 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_1_0_sh_mask.h3709 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1840 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1351 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2407 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2286 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10470 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2353 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2483 #define DMCU_EVENT_TRIGGER__GEN_SW_INT_TO_UC_MASK … macro