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Searched refs:DMA_CH_TCR (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac-hw.c509 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_enable_tx()
512 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_enable_tx()
566 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_disable_tx()
569 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_disable_tx()
1389 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_config_tso_mode()
1392 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_config_tso_mode()
1750 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_config_osp_mode()
1754 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_config_osp_mode()
1782 regval = readl(XLGMAC_DMA_REG(pdata->channel_head, DMA_CH_TCR)); in xlgmac_get_tx_pbl_val()
1799 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_config_tx_pbl_val()
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H A Ddwc-xlgmac-reg.h541 #define DMA_CH_TCR 0x04 macro
/openbmc/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c196 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, in xgbe_config_pbl_val()
215 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, OSP, in xgbe_config_osp_mode()
305 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, TSE, 1); in xgbe_config_tso_mode()
3348 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 1); in xgbe_enable_tx()
3380 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 0); in xgbe_disable_tx()
3470 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 1); in xgbe_powerup_tx()
3493 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 0); in xgbe_powerdown_tx()
H A Dxgbe-common.h188 #define DMA_CH_TCR 0x04 macro