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Searched refs:DMA_CH_SR (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-drv.c501 dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR); in xgbe_isr_task()
510 (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) || in xgbe_isr_task()
511 XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) { in xgbe_isr_task()
524 XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, TI, 0); in xgbe_isr_task()
525 XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, RI, 0); in xgbe_isr_task()
528 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU)) in xgbe_isr_task()
532 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE)) in xgbe_isr_task()
536 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr); in xgbe_isr_task()
637 XGMAC_SET_BITS(dma_status, DMA_CH_SR, TI, 1); in xgbe_dma_isr()
638 XGMAC_SET_BITS(dma_status, DMA_CH_SR, RI, 1); in xgbe_dma_isr()
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H A Dxgbe-common.h206 #define DMA_CH_SR 0x60 macro
H A Dxgbe-dev.c673 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, in xgbe_enable_dma_interrupts()
674 XGMAC_DMA_IOREAD(channel, DMA_CH_SR)); in xgbe_enable_dma_interrupts()
/openbmc/linux/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac-reg.h553 #define DMA_CH_SR 0x60 macro
H A Ddwc-xlgmac-net.c277 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
324 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
H A Ddwc-xlgmac-hw.c2455 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_enable_dma_interrupts()
2456 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_enable_dma_interrupts()