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Searched refs:DMAR_GSTS_REG (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/iommu/intel/
H A Dirq_remapping.c101 gsts = readl(iommu->reg + DMAR_GSTS_REG); in init_ir_status()
479 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_set_irq_remapping()
501 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_enable_irq_remapping()
508 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_enable_irq_remapping()
674 sts = readl(iommu->reg + DMAR_GSTS_REG); in iommu_disable_irq_remapping()
681 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_disable_irq_remapping()
H A Ddebugfs.c291 sts = dmar_readl(iommu->reg + DMAR_GSTS_REG); in dmar_translation_struct_show()
526 sts = dmar_readl(iommu->reg + DMAR_GSTS_REG); in ir_translation_struct_show()
H A Ddmar.c1110 sts = readl(iommu->reg + DMAR_GSTS_REG); in alloc_iommu()
1675 sts = readl(iommu->reg + DMAR_GSTS_REG); in dmar_disable_qi()
1690 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, in dmar_disable_qi()
1727 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, (sts & DMA_GSTS_QIES), sts); in __dmar_enable_qi()
H A Diommu.c318 gsts = readl(iommu->reg + DMAR_GSTS_REG); in init_translation_status()
1234 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_set_root_entry()
1264 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_flush_write_buffer()
1654 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_enable_translation()
1674 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, in iommu_disable_translation()
H A Diommu.h66 #define DMAR_GSTS_REG 0x1c /* Global status register */ macro
/openbmc/qemu/hw/i386/
H A Dintel_iommu.c2348 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_QIES); in vtd_handle_gcmd_qie()
2368 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_QIES, 0); in vtd_handle_gcmd_qie()
2383 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_RTPS); in vtd_handle_gcmd_srtp()
2393 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRTPS); in vtd_handle_gcmd_sirtp()
2408 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_TES); in vtd_handle_gcmd_te()
2415 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_TES, 0); in vtd_handle_gcmd_te()
2430 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRES); in vtd_handle_gcmd_ire()
2434 vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_IRES, 0); in vtd_handle_gcmd_ire()
2442 uint32_t status = vtd_get_long_raw(s, DMAR_GSTS_REG); in vtd_handle_gcmd_write()
4211 vtd_define_long(s, DMAR_GSTS_REG, 0, 0, 0); in vtd_init()
H A Dintel_iommu_internal.h41 #define DMAR_GSTS_REG 0x1c /* Global status */ macro