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Searched refs:DMA0_POL (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/ppc/
H A Dppc440_uc.c520 DMA0_POL = 0x26, enumerator
720 ppc_dcr_register(env, dcr_base + DMA0_POL, in ppc4xx_dma_init()
H A Dppc405_uc.c234 DMA0_POL = 0x126, enumerator
297 ppc4xx_dcr_register(dcr, DMA0_POL, dma, &dcr_read_dma, &dcr_write_dma); in ppc405_dma_realize()