Searched refs:DKL_PLL_DIV1 (Results 1 – 2 of 2) sorted by relevance
76 #define DKL_PLL_DIV1(tc_port) _DKL_REG(tc_port, \ macro
3508 hw_state->mg_pll_div1 = intel_dkl_phy_read(dev_priv, DKL_PLL_DIV1(tc_port)); in dkl_pll_get_hw_state()3730 val = intel_dkl_phy_read(dev_priv, DKL_PLL_DIV1(tc_port)); in dkl_pll_write()3734 intel_dkl_phy_write(dev_priv, DKL_PLL_DIV1(tc_port), val); in dkl_pll_write()