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Searched refs:DEFAULT_PMBASE (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dcpu.c152 pm1_sts = inw(DEFAULT_PMBASE + PM1_STS); in checkcpu()
155 pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT); in checkcpu()
H A Dlpc.c487 dm_pci_write_config32(dev->parent, PMBASE, DEFAULT_PMBASE | 1); in bd82x6x_lpc_early_init()
494 outw(1 << 11, DEFAULT_PMBASE | 0x60 | 0x08); /* halt timer */ in bd82x6x_lpc_early_init()
H A Dsdram.c414 .pmbase = DEFAULT_PMBASE, in dram_init()
/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dpch.h28 #define DEFAULT_PMBASE 0x0500 macro