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Searched refs:DEF (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/include/tcg/
H A Dtcg-opc.h30 DEF(discard, 1, 0, 0, TCG_OPF_NOT_PRESENT)
31 DEF(set_label, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
34 DEF(call, 0, 0, 3, TCG_OPF_CALL_CLOBBER | TCG_OPF_NOT_PRESENT)
36 DEF(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
37 DEF(brcond, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH | TCG_OPF_INT)
39 DEF(mb, 0, 0, 1, TCG_OPF_NOT_PRESENT)
41 DEF(mov, 1, 1, 0, TCG_OPF_INT | TCG_OPF_NOT_PRESENT)
43 DEF(add, 1, 2, 0, TCG_OPF_INT)
44 DEF(and, 1, 2, 0, TCG_OPF_INT)
45 DEF(andc, 1, 2, 0, TCG_OPF_INT)
[all …]
H A Dtcg.h69 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name, macro
71 #undef DEF
/openbmc/openbmc/poky/meta/recipes-core/ovmf/ovmf/
H A D0003-debug-prefix-map.patch27 *_*_*_DTC_PATH = DEF(DTC_BIN)
33 …DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -mabi=aapcs -fno-short-…
34 …DEFINE GCC_LOONGARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d -fno-asynchronous-unwind-ta…
35 @@ -941,8 +941,8 @@ DEFINE GCC_ARM_ASLDLINK_FLAGS = DEF
36 …NE GCC_AARCH64_ASLDLINK_FLAGS = DEF(GCC_AARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u $(…
37 …DEFINE GCC_LOONGARCH64_ASLDLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpi…
38 …DEFINE GCC_IA32_X64_DLINK_FLAGS = DEF(GCC_IA32_X64_DLINK_COMMON) --entry _$(IMAGE_ENTRY_POINT) …
47 *_GCC48_IA32_DLINK2_FLAGS = DEF(GCC48_IA32_DLINK2_FLAGS)
48 *_GCC48_IA32_RC_FLAGS = DEF(GCC_IA32_RC_FLAGS)
53 DEBUG_GCC48_IA32_CC_FLAGS = DEF(GCC48_IA32_CC_FLAGS)
[all …]
/openbmc/qemu/target/arm/
H A Dcpu-sysregs.h21 #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) NAME##_IDX, macro
28 #undef DEF
29 #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) \ macro
36 #undef DEF
/openbmc/qemu/tcg/ppc/
H A Dtcg-target-opc.h.inc27 DEF(ppc_mrgh_vec, 1, 2, 0, TCG_OPF_VECTOR)
28 DEF(ppc_mrgl_vec, 1, 2, 0, TCG_OPF_VECTOR)
29 DEF(ppc_msum_vec, 1, 3, 0, TCG_OPF_VECTOR)
30 DEF(ppc_muleu_vec, 1, 2, 0, TCG_OPF_VECTOR)
31 DEF(ppc_mulou_vec, 1, 2, 0, TCG_OPF_VECTOR)
32 DEF(ppc_pkum_vec, 1, 2, 0, TCG_OPF_VECTOR)
/openbmc/qemu/tcg/arm/
H A Dtcg-target-opc.h.inc14 DEF(arm_sli_vec, 1, 2, 1, TCG_OPF_VECTOR)
15 DEF(arm_sshl_vec, 1, 2, 0, TCG_OPF_VECTOR)
16 DEF(arm_ushl_vec, 1, 2, 0, TCG_OPF_VECTOR)
/openbmc/qemu/tcg/s390x/
H A Dtcg-target-opc.h.inc13 DEF(s390_vuph_vec, 1, 1, 0, TCG_OPF_VECTOR)
14 DEF(s390_vupl_vec, 1, 1, 0, TCG_OPF_VECTOR)
15 DEF(s390_vpks_vec, 1, 2, 0, TCG_OPF_VECTOR)
/openbmc/qemu/tcg/
H A Dtcg-common.c30 #define DEF(s, oargs, iargs, cargs, flags) \ macro
33 #undef DEF
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target-opc.h.inc14 DEF(aa64_sshl_vec, 1, 2, 0, TCG_OPF_VECTOR)
15 DEF(aa64_sli_vec, 1, 2, 1, TCG_OPF_VECTOR)
/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/
H A D0002-Enforce-using-good-old-BFD-linker.patch32 …DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverb…
/openbmc/qemu/docs/devel/
H A Ddocs.rst58 the ``DEF()`` macro to define each option and specify its ``--help``
/openbmc/openbmc/poky/meta/recipes-core/ovmf/
H A Dovmf_git.bb115 -e 's#\(ENV\|DEF\)(GCC.*_PREFIX)#ENV(HOST_PREFIX)#' \
/openbmc/qemu/hw/net/
H A Dpcnet.c259 GET_FIELD((T)->status, TMDS, DEF), \
/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dext.idef1103 * MACROS GO IN MACROS.DEF NOT HERE!!!