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Searched refs:DDR_TAP_MAX_VAL (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c217 #define DDR_TAP_MAX_VAL 0x40 macro
460 } while (tap < DDR_TAP_MAX_VAL); in ddr_tap_tuning()
464 tap_val %= DDR_TAP_MAX_VAL; in ddr_tap_tuning()