Home
last modified time | relevance | path

Searched refs:DDR_SIZE_CS_OFF (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-mvebu/
H A Dcpu.c16 #define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) macro
308 temp = (readl(MVEBU_SDRAM_BASE + DDR_SIZE_CS_OFF(i)) & in update_sdram_window_sizes()
311 writel(temp, MVEBU_SDRAM_BASE + DDR_SIZE_CS_OFF(i)); in update_sdram_window_sizes()
320 clrbits_le32(MVEBU_SDRAM_BASE + DDR_SIZE_CS_OFF(i), 1); in update_sdram_window_sizes()
H A Dmbus.c81 #define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) macro
327 u32 size = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i)); in mvebu_mbus_default_setup_cpu_target()
/openbmc/linux/drivers/bus/
H A Dmvebu-mbus.c93 #define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) macro
415 u32 sizereg = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i)); in mvebu_sdram_debug_show_orion()
680 u32 size = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i)); in mvebu_mbus_default_setup_cpu_target()
712 u32 size = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i)); in mvebu_mbus_default_save_cpu_target()
717 writel(mbus->sdramwins_phys_base + DDR_SIZE_CS_OFF(i), in mvebu_mbus_default_save_cpu_target()