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Searched refs:DDR_REG_BIST_MASK_AHB_GE0_1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c197 #define DDR_REG_BIST_MASK_AHB_GE0_1 0x6c macro
433 writel(0xffff, regs + DDR_REG_BIST_MASK_AHB_GE0_1); in ddr_tap_tuning()