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Searched refs:DDR_REG_BIST (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c201 #define DDR_REG_BIST 0x11c macro
439 writel(DDR_BIST_TEST_START, regs + DDR_REG_BIST); in ddr_tap_tuning()
446 writel(0, regs + DDR_REG_BIST); in ddr_tap_tuning()