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Searched refs:DDR_PLLDIV (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-davinci/
H A Dcpu.c33 #define DDR_PLLDIV PLLC_PLLDIV1 macro
39 #define DDR_PLLDIV PLLC_PLLDIV2 macro
45 #define DDR_PLLDIV PLLC_PLLDIV1 macro
203 gd->bd->bi_ddr_freq = pll_sysclk_mhz(pllbase, DDR_PLLDIV) / 2; in set_cpu_clk_info()
/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dpll_defs.h78 #define DDR_PLLDIV (offsetof(struct dv_pll_regs, plldiv7)) macro