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Searched refs:DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dddr.c86 DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK, in mx7_dram_cfg()
89 ~DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK, in mx7_dram_cfg()
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dmx7-ddr.h141 #define DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK BIT(24) macro